1. Field of the Invention
The present invention relates to a method of manufacturing MOS field-effect transistors and particularly to a method of forming MOS field-effect transistors using a substrate where a semiconductor single crystal film is formed on an insulator.
2. Description of the Prior Art
In order to realize high speed operation and high density integration of a semiconductor device, efforts have been made to manufacture a semiconductor integrated circuit device of a small stray capacity by separating circuit elements by dielectric material. In one method, for example, a polycrystal or amorphous semiconductor film is deposited on an insulator and an energy beam, such as a laser beam, an electron beam or the like, is applied to the surface of the semiconductor film so as to heat only the surface layer, whereby a single crystal semiconductor film is formed and MOS filed-effect transistors (MOS FETs) subsequently are formed thereon. In such a manner, an element of an extremely small stray capacity having the circumference and the lower portion separated from other circuit elements by a dielectric material can be obtained.
FIGS. 1A to 1I are sectional views showing states in the major steps of manufacturing a MOS field-effect transistor according to such a conventional method. First, as shown in FIG. 1A, a polysilicon layer 11 of a thickness of 5000 .ANG., for example, is deposited on a silicon dioxide (SiO.sub.2) substrate 10 by an ordinary low pressure chemical vapor deposition (CVD) method. The polysilicon layer 11 is then exposed to an oxidizing atmosphere at a temperature of 950.degree. C., for example, so as to form an oxide film 12 of a thickness of 500 .ANG. for example, on which a nitride film 13 of a thickness of 1000 .ANG., for example, is deposited by the low pressure chemical vapor deposition method, as shown in FIG. 1B. Then, as shown in FIG. 1C, the nitride film 13 is patterned by a photographic process. Subsequently, the films are exposed to an oxidizing atmosphere, at a temperature of 950.degree. C. for example, for a long period of time so that all the portions without the pattern of the nitride film 13 are oxidized. After that, the nitride film 13 and the oxide film 12 existing under the nitride film 13 are removed and then, as shown in FIG. 1D, a form in which the circumference and the lower portion of the polysilicon layer 11 are surrounded by the insulating silicon dioxide materials 10 and 14 can be obtained. However, in this state, the polysilicon layer 11 does not have a crystallizing property for forming an element and accordingly, by applying a narrowly focused energy beam such as laser beam or electron beam and the like, the polysilicon is melted to be recrystallized so that polysilicon of single crystal or of a large grain diameter is obtained. FIG. 1E shows this step where the reference numeral 15 denotes the recrystallized silicon layer. Subsequently, according to an ordinary process of manufacturing a MOS field-effect transistor, a gate oxide film 16 is formed on the recrystallized silicon layer 15 as shown in FIG. 1F and then, as shown in FIG. 1G, polysilicon is deposited on the gate oxide film 16 to undergo a desired patterning so that a polysilicon gate electrode 17 is formed. Subsequently, as shown in FIG. 1H, using the polysilicon gate electrode 17 as a mask, a large amount of impurity is introduced in the recrystallized silicon layer 15 so that a source region 18 and a drain region 19 are formed. After that, as shown in FIG. 1I, an oxide film 20 is formed on the whole surface and contact holes are provided in the portions above the gate electrode 17, the source region 18 and the drain region 19 so that a gate wiring 21, a source wiring 22 and a drain wiring 23 are provided, and then a surface protective film 24 is formed on the whole surface. Thus, the manufacture of the MOS field-effect transistor is completed.
In a conventional manufacturing method, all the regions assigned for forming MOS field-effect transistors are melted and recrystallized by application of a laser beam and the like. In another conventional method, the whole surface of a polycrystal silicon layer formed on a wafer is melted and recrystallized in advance so that elements are formed thereon. However, in such conventional methods, a large strain occurs in the recrystallized silicon layer from various causes such as local solidification and expansion due to the melting and recrystallization or a difference of the thermal expansion coefficients of the silicon and the insulating substrate. In addition, it is extremely difficult to remove such a strain in an ordinary process. Such a strain causes unfavorable influences in the electric characteristics such as irregularities in the carrier mobility, leakage of minor current in the pn junction, etc., also causes warping of the whole wafer, which hinders a fine patterning.